Electro-optic silicon nitride via electric poling

ABSTRACT

A deposition method for manufacturing an active electro-optic layer includes providing a substrate or a base layer; and applying an electric field across a silicon nitride layer as it is being deposited on the substrate or the base layer to cause a poling of a deposited layer. Alternative methods for poling an active electro-optic layer and an electro-optical device are also described.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority to and the benefit of U.S. provisionalpatent application Ser. No. 62/747,250, ELECTRO-OPTIC SILICON NITRIDEVIA ELECTRIC POLING, filed Oct. 18, 2018, which application isincorporated herein by reference in its entirety.

STATEMENT REGARDING FEDERALLY FUNDED RESEARCH OR DEVELOPMENT

This invention was made with government support under grant numberECCS1941213 awarded by the National Science Foundation. The governmenthas certain rights in the invention.

FIELD OF THE APPLICATION

The application relates to active electro optic materials andparticularly to forming active electro optic materials on a substrate orbase layer.

BACKGROUND

Photonic devices operate in the UV, Visible, Near IR, and Mid IR partsof the electromagnetic spectrum. Photonic devices are used, for example,in communications over optical fiber links or line of sight free-spaceconnections. Photonic technologies are also fundamental in lightdetection and ranging (LIDAR) to acquire targets and guide vehicles,e.g. autonomous vehicles. Also, aircraft use light to carry signalsacross systems to reduce weight and resist electromagnetic interference.

SUMMARY

A deposition method for manufacturing an active electro-optic layerincludes providing a substrate or base layer; and applying an electricfield across a silicon nitride layer as it is being deposited on thesubstrate or base layer to cause a poling of a deposited layer.

The step of applying can include applying the electric field across thesilicon nitride layer as it is being deposited on the substrate or baselayer using a CMOS process. The step of applying can include applyingthe electric field across the silicon nitride layer as it is beingdeposited on the substrate or base layer to form an electro-opticsilicon nitride (EO-SiN) thin film layer. The step of applying caninclude applying the electric field across the silicon nitride layer asit is being deposited on the substrate or base layer by a low-pressurechemical vapor deposition (LPCVD) process. The step of applying caninclude applying the electric field across the silicon nitride layer asit is being deposited on the substrate or base layer by an inductivelycoupled plasma enhanced chemical vapor deposition (ICPCVD) process. Thestep of applying can include applying the electric field across thesilicon nitride layer as it is being deposited on an electrically biasedsubstrate. The step of applying can include applying the electric fieldacross the silicon nitride layer as it is being deposited on anelectrically biased substrate to form an EO-SiN modulator.

The method can further include after the step of applying, applying atleast one more step of applying the electric field across anothersilicon nitride layer as it is being deposited on the substrate or baselayer to form at least one more stacked poled layer of a 3D photonicsstructure. The method can further include after the step of applying,repeating the step of applying N times to form N stacked poled layers ofa 3D photonics structure.

Another method for poling an active electro-optic layer includesproviding a substrate or base layer and disposed thereon a siliconnitride film layer; heating the silicon nitride film layer; and applyingan electric field across the silicon nitride film layer to cause polingof a deposited layer.

The step of applying can include applying the electric field between anitride film and a back of a silicon wafer substrate.

The method wherein before the step of applying, a step of immersing thesubstrate or base layer in an electrolyte solution.

Yet another method for poling an active electro-optic layer includesproviding a substrate or base layer and disposed thereon a siliconnitride film layer; and applying an electric field across the siliconnitride film layer by use of a probe with a conductive tip to causepoling of a deposited layer.

The step of applying the electric field can include applying theelectric field by a bias voltage applied between the conductive tip andthe silicon nitride film layer to cause poling of the deposited layer.The step of applying the electric field can include applying theelectric field by an atomic force microscope (AFM) probe to selectivelypole written portions into the silicon nitride film layer.

An integrated device including electro-optical structure to be poledduring device fabrication includes a substrate or a base layer. At leastone optical waveguide includes a silicon nitride deposited on thesubstrate or the base layer. A first electrode is deposited on thesubstrate or the base layer on a first side of or above the at least oneoptical waveguide. The first electrode can accept a first polarity of ahigh voltage bias. A second electrode is deposited on a second side ofor below the at least one optical waveguide. The second electrode canaccept a second polarity of the high voltage bias. The at least oneoptical waveguide is poled by application of the high voltage biasduring production.

At least one of the first electrode and the second electrode can includean ohmic heating element adapted to accept a heating current appliedtherethrough.

The electrode and the second electrode can include operating terminalsof the integrated device.

The optical waveguide can include a ring resonator. The first electrodeis disposed within the ring resonator, and the second electrode isdisposed outside of the ring resonator, and the first electrode includesa circular shape, and the second electrode includes an annulus shape.

The integrated device can include an integrated silicon nitride opticalwaveguide as part of a CMOS integrated circuit.

The foregoing and other aspects, features, and advantages of theapplication will become more apparent from the following description andfrom the claims.

BRIEF DESCRIPTION OF THE DRAWINGS

The features of the application can be better understood with referenceto the drawings described below, and the claims. The drawings are notnecessarily to scale, emphasis instead generally being placed uponillustrating the principles described herein. In the drawings, likenumerals are used to indicate like parts throughout the various views.

FIG. 1A shows a dipole orientation in a material where depositiondipoles in the material have a random orientation;

FIG. 1B shows a dipole orientation in a material where the polingprocess aligned the dipoles along the same direction giving rise to theelectro-optic effect;

FIG. 2 is a schematic diagram showing an exemplary Maker fringesexperimental setup;

FIG. 3A shows a drawing of an exemplary setup for electrical poling;

FIG. 3B shows a cross section drawing of the setup of FIG. 3A;

FIG. 4 shows a drawing of an exemplary Atomic Force Microscopy (AFM)poling process;

FIG. 5A shows an AFM image of a Topography of an as-deposited nitridefilm;

FIG. 5B shows an AFM image of an EFM phase image of as-deposited nitridefilm;

FIG. 5C shows an AFM image of a topography of a nitride film after beingpoled;

FIG. 5D shows an AFM image of a topography of an EFM phase image ofpoled nitride film;

FIG. 6 shows a schematic diagram of an EO-SiN deposition process;

FIG. 7 is a cross section drawing of an exemplary microring modulatordevice fabricated in an EO-SiN platform;

FIG. 8 is a drawing showing an exemplary ring modulator according toFIG. 7;

FIG. 9 is a drawing of an electro-optic silicon nitride 3D devicestructure where at least one additional silicon nitride layer has beendeposited on a substrate or base layer to form at least one more stackedpoled layer of a 3D photonics structure;

FIG. 10 is a drawing of an electro-optic silicon nitride 3D devicestructure having N stacked poled layers of a 3D photonics structure; and

FIG. 11 is a drawing showing an exemplary integrated ring modulatorstructure poled by an electric field impressed across a silicon nitridestructure heated by an integrated microheater.

DETAILED DESCRIPTION

In the description, other than the bolded paragraph numbers, non-boldedsquare brackets (“[ ]”) refer to the citations listed hereinbelow.

Integrating Complementary Metal-Oxide-Semiconductor (CMOS) electronicswith photonic devices in a single platform will enable low-costtechnologies to access and control the electromagnetic spectrum from thevisible into the IR in low size, weight, and power (SWaP) packages. CMOSelectronics are used in microprocessors, memory, digital and analogcircuits, and microcontrollers. CMOS dominates the electronics landscapeand has a large manufacturing infrastructure, leading to low cost. Onthe other hand, multiple materials platforms are used in photonicsdepending on the application. The diverse photonic platforms present achallenge towards integration. For example, modulators, used to encodeinformation into light, are implemented in lithium niobate, while III-Vmaterials such as Indium Phosphide are used for laser diodes. Recently,silicon photonics has become a promising platform for photonicsintegration with electronics.

However, current approaches to electronic and photonic integration on asingle chip are limited by a lack of optically active materials that arecompatible with electronics manufacturing. Optically active materialsenable tuning of the electromagnetic spectrum by applying a voltage tochange their refractive index. The ideal material for integratedphotonics is compatible with CMOS electronics, has a high refractiveindex, can be deposited, is electro-optically active, and has a lowloss. Current photonic platforms fall short of meeting thesecharacteristics.

Because of its high refractive index and relative compatibility withCMOS electronics, silicon has revolutionized photonics over the last twodecades. However, the silicon photonic platform is fundamentally limitedby loss. Because silicon doesn't exhibit a Pockel's effect due itssymmetric crystalline structure, to realize active devices one must usethe plasma dispersion effect [2]. The plasma dispersion effect producesa change in refractive index when the free carrier density of thematerial changes. Unfortunately, free carriers lead to optical loss dueto absorption and the change in refractive index is fundamentallylimited by loss [3]. While heat can be used to change the refractive insilicon, this process is relatively slow (on the order of 1-10 μs). Insilicon fast (tens of picoseconds) change in the refractive index cannotbe induced, without inducing loss.

The optical loss inherent to the silicon photonics platform leads toincreased power consumption. While photonic devices in silicon arerelatively small and consume relatively low electrical power, opticalloss still leads to increased electrical power consumption. The linkbetween optical loss and electrical power consumption is through thelight source: the laser. For example, to compensate typical photonicdevice loses 50% of the incident optical power, the power of the lasermust be doubled, thus doubling the power consumption of the device.Additionally, the lost power eventually ends up as heat, which must beremoved from the device, leading to additional power consumption.

Lithium Niobate and III-V compound semiconductors (e.g. InP, GaAs) havea native electro-optic effect and their refractive index can be tuned byapplying a voltage without inducing optical loss. However, LithiumNiobate and III-V compound semiconductors are expensive and must bebonded to integrate them with CMOS electronics. The bonding process isexpensive and can only yield one active optical layer. Other materialswith an electro-optic effect, such as silicon carbide and electro-opticpolymers, suffer from lack of suitable substrates and reliability,respectively.

This Application describes a new method for engineering an electro-opticeffect in deposited silicon nitride (EO-SiN) by electrical poling.According to the new method of the Application, the EO-SiN can bedeposited using standard CMOS manufacturing processes. A photonicplatform so made according to the new method can enable large-scalemonolithic integration of photonics and CMOS electronics for RF, LIDAR,quantum optics, optical clocks, and signal processing for EMS dominance.The new method will also enable large-scale integration of multilayerphotonics with electronics using the CMOS manufacturing infrastructurefor low power, low cost, adaptive devices to control the electromagneticspectrum.

The description continues in 7 parts. Part 1 describes a technicalapproach of engineering an electro-optic effect by poling. Part 2describes a laboratory apparatus to measure χ⁽²⁾ properties of depositedthinfilms. Part 3 describes electrical poling of silicon nitride films.Part 4 describes an In-situ electrical poling of silicon nitride filmsduring deposition. Part 5 describes an exemplary EO-SiN microringmodulator. Part 6 describes exemplary applications. Part 7 describes 3Dphotonics structures. Part 8 describes poling silicon nitride structureswith an electric field across a local area heated by an integratedmicroheater.

Part 1—Technical Approach of Engineering an Electro-Optic Effect byPoling

An ideal material for integrated photonics is low loss, has a highrefractive index, is deposited, has CMOS compatibility, and iselectro-optically active; however, current photonic platforms fall shortof meeting these characteristics. Crystalline silicon has a highrefractive index and is CMOS compatible, however silicon requiresexpensive silicon on insulator (SOI) wafers (i.e. cannot be deposited),has high optical losses, and has no electro-optic effect. The refractiveindex of silicon is tuned by moving electrical carriers, which leads toloss [3]. Other active materials for photonics, such as lithium niobate[4] and silicon carbide [5] lose their attractive properties whendeposited and otherwise are challenging to integrate with CMOSelectronics (Table I). Silicon nitride is a low loss (transparent fromthe UV to the midIR), deposited, CMOS compatible material with a highrefractive index, but it is passive. Recently, several works haveobserved weak second harmonic generation in as-deposited silicon nitride[6-10]. In a seminal theoretical work, Khurgin, et al. [11] have shownthat the origin of the weak electro-optic effect observed in siliconnitride is due to order in the material that is induced by strain in thefilm. Their hypothesis explains why as-deposited silicon nitride filmsshow an electro-optic effect (2.5 pm/V), while annealed films show amuch lower one (0.01 pm/V) [6,7].

The Application describes a device and method to engineer the order in asilicon nitride film using an applied electric field.

FIG. 1A to FIG. 1B shows a dipole orientation in a material before andafter poling. FIG. 1A shows a dipole orientation in a material wheredeposition dipoles in the material have a random orientation. FIG. 1Bshows a dipole orientation in a material where the poling process hasaligned the dipoles along the same direction giving rise to theelectro-optic effect.

A strong electric field can change the material properties to engineeran electro-optic effect in a process called poling. In silicon nitride,which is a polar material, each tetragon in the material behaves like adipole [11]. During deposition the dipoles are arranged in randomdirections and the net nonlinear polarizability is negligible (FIG. 1A).Applying a strong electric field will change the direction of thedipoles. If a strong enough electric field is applied, one can align themajority of the dipoles in the material with the direction of theapplied electric field (FIG. 1B). Heating the material to be poledincreases the mobility of the dipoles and reduces the electric fieldneeded to realign them.

Part 2—Laboratory Apparatus to Measure χ⁽²⁾ Properties of DepositedThinfilms

FIG. 2 is a schematic diagram showing an exemplary Maker fringesexperimental setup based on Verbiest, et al. [12].

As used hereinbelow, χ⁽²⁾ is the nonlinear second order opticalsusceptibility. The χ⁽²⁾ properties of deposited thin films aretypically measured via second harmonic generation. However, in order todistinguish between second harmonic generation from the bulk of the thinfilm and surface, a variation of the Maker fringes technique should beused [12-15]. The Maker fringes technique includes rotating the sampleand measuring the second harmonic generation of the sample as a functionof angle. The Maker fringes technique works by measuring the secondharmonic (SH) signal produced by a noncentrosymmetric materialpossessing a χ⁽²⁾ term. Such materials exhibit fundamentaloptoelectronic properties that are integral for photonic applications.The sample can be placed on a rotation stage. As the sample rotatesabout its axis, the SH signal should vary in a sinusoidal manner (FIG.2).

The model and experimental technique can be used for reflectivesubstrates. This technique is normally implemented for samples with atransparent substrate. Films can be deposited on a silicon substrate,which is transparent at 1550 nm, but reflective at the second harmonicwavelength of 775 nm. Because silicon is a centrosymmetric crystal, itlacks the χ⁽²⁾ term and will not produce an SH signal. However, ananalytical model that describes configuration device and methodconfigurations of the Application (FIG. 2) can be used. A lithiumniobate on oxide on a silicon substrate can be used to validate themodel (Oxide doesn't exhibit a χ⁽²⁾ term so it won't contribute to theSH signal, either.) Because lithium niobate is a well-known material itsproperties can be measured using our new technique to validate the newmodel. A 1550 nm femtosecond laser with high peak power (˜300 kW) can bedirected towards an attenuator, a beam splitter, and a mirror. Theattenuator allows for fine control of the pulse power incident on thesample. One of the beams from the beamsplitter can be directed towardsan avalanche photodetector as a reference beam. The second beam can thenbe directed towards a mirror (to condense the setup), and cleaned by theλ/2 wave plate, a filter, and a diaphragm. The lens setup gives uscontrol over the beam's spot size at the sample. The output SH or 2ωbeam can be cleaned via the Glan Polarizer and Filter 2. Filter 2 canalso be used to prevent the main laser beam from interfering with themeasurements. Finally, the SH beam generated by the film deposited onthe wafer can be directed to a detector, where the SH signal can beprocessed to monitor the sample's SH efficiency and the coherencelength. The sample, polarizer, filter, and detector rotate together tomaintain alignment between the SH signal and the detector. Note thatmost of the pump light can transmit through the silicon wafer sincesilicon is transparent at 1550 nm.

Part 3—Electrical Poling of Silicon Nitride Films

Electrical poling is a technique used to align the dipoles of a materialalong a desired direction. Electrical poling is used to “activate”electro-optic polymers whose dipoles are randomly oriented during spincoating. Electrical poling can also be used to flip the dipolearrangement in lithium niobate to create periodically poled lithiumniobate and allow quasi phase matching. Electrical poling has alsoinduced an electro optic effect in glass. For glasses with ionicdopants, the induced electro-optic effect is strong [16]. However, evenfor pure silica, a measurable electro-optic coefficient can be createdby applying a strong electric field [17].

An electro optic effect can be induced in deposited silicon nitrideusing two electrical poling techniques: 1—applying an electric fieldwhile heating, and 2—atomic force microscopy poling.

FIG. 3A shows a drawing of an exemplary setup for electrical poling.FIG. 3B shows a cross section drawing of the setup of FIG. 3A. The wafersits between a grounded hot plate and the electrolyte solution. Thevoltage from an arbitrary waveform generator is amplified beforereaching the electrode.

To pole with an electric field while heating the sample, a silicon wafercoated with a silicon nitride film can be immersed in an electrolytesolution and a voltage can be applied between the nitride film and theback of the silicon wafer (FIG. 3A, FIG. 3B). Because the silicon waferhas a low resistivity, a strong electric field can be induced across thesilicon nitride film just below its dielectric breakdown of 10 MeV/cm[18]. To increase the mobility of the dipoles in the film, the samplecan be heated. The electric field can stay on until the sample coolsdown in order to “freeze” the dipoles in their ordered place. The shapeand duration of the applied electric field waveform can be optimized toenhance dipole alignment. Because silicon nitride is a very stablematerial, which is typically used as a diffusion barrier, theelectro-optic characteristics can be long-lasting.

FIG. 4 shows a drawing of an exemplary Atomic Force Microscopy (AFM)poling process. During the “write” cycle a high voltage is applied tothe conductive tip while scanning across the area being poled. For the“read” cycle, the voltage is reduced, and the tip is scanned over thesample again.

Atomic Force Microscopy (AFM) poling can be performed by use of aconductive AFM tip where a bias voltage is applied between the sampleand tip. Because the tip is sharp, very high electric fields can beapplied over precise areas on the samples. Moreover, once the dipolesare realigned on the sample, the poling on the sample can be “read” byscanning over that same area with a low voltage 19] (FIG. 4). The AFMpoling technique allows selective poling over the areas where refractiveindex modulation is needed.

FIG. 5A to FIG. 5D shows preliminary results of AFM poling. FIG. 5Ashows an AFM image of a Topography of an as-deposited nitride film. FIG.5B shows an AFM image of an EFM phase image of as-deposited nitride filmscanned at low voltage (5V) applied to the tip. FIG. 5C shows an AFMimage of a topography of a nitride film after being poled where thepoling test was done by applying 30V dc to the tip. FIG. 5D shows an AFMimage of a topography of an EFM phase image of poled nitride film. Thescan in FIG. 5D was done over a slightly larger area than in FIG. 5C toshow difference in EFM signal compared to un-poled background.

Preliminary testing has shown that after applying a bias across asilicon nitride sample, poling of the film can be observed when doingthe “read” procedure using the AFM. To perform the preliminaryexperiment of AFM poling on a silicon nitride film, silicon nitride wasdeposited on a silicon wafer via low-pressure chemical vapor deposition(LPCVD). The sample was scanned with a conductive AFM tip electrostaticforce microscopy (EFM) mode. In this mode a dc bias can be appliedacross the AFM cantilever tip. A “read” scan was performed with a low dcbias voltage of 5V and “write” scan performed with a dc bias voltage of30V. The initial scans were done in the “read” voltage (FIG. 5A, FIG.5B). Then, a small area of the sample 0.5×0.5 μm² was scanned in the“write” voltage to pole the film. Finally, the poled area with the“read” voltage was scanned to observe the poling (FIG. 5C, FIG. 5D). TheEFM phase image showed that the poling was successful in showing that wecan pole silicon nitride to induce a strong electro-optic effect aspredicted by Khurgin, et al. [11] For the experiment, a Solver Next SPMinstrument equipped with FMG01/Pt conductive cantilever tips and anexternal voltage amplifier were used. AFM poling shows that poling insilicon nitride is possible and can be used to optimize electric fieldparameters for the full sample poling process.

Part 4—In-Situ Electrical Poling of Silicon Nitride Films DuringDeposition

Poling of silicon nitride films “in-situ” can be done during thedeposition to enable multilayer electrically active photonic devices,which can be integrated directly on electronics. In-situ electricalpoling of silicon nitride films will open the door to 3D photonics andenable complex devices such as high radix switches, signal processing,two dimensional optical phase arrays with lambda over 2 spacing.

FIG. 6 shows a schematic diagram of an EO-SiN deposition process. Thesilicon nitride reacts in the plasma and is deposited on the surface ofthe wafer. The applied electric field across the substrate inducesalignment of the dipoles and induces the electro-optic effect.

To pole the silicon nitride films during deposition, an electric fieldcan be applied to the substrate while the film is being deposited (FIG.6). An ideal time to arrange the dipoles of the silicon nitride film isduring deposition, because the deposited constituents are highly mobileand can arrange themselves before “setting” on the film's surface. Thedeposition process also occurs at an elevated temperature making iteasier for the dipoles align.

An inductively coupled plasma enhanced chemical vapor deposition(ICPCVD) can be used with a substrate bias. In ICPCVD nitridedeposition, the sample sits at a temperature around 400° C. and silaneand ammonia gases are used as precursors for the silicon and nitrogencontent. These gases are broken up in the plasma and react to form thesilicon nitride film on the substrate. The substrate can be electricallybiased, forcing the dipoles in the film to align creating theelectro-optic effect. A similar outcome has been observed with amorphousdeposition of aluminum nitride via RF sputtering and a biased substrate[20,21]. In an ICPCVD, the plasma generation is decoupled from thesubstrate bias. The plasma is generated by an inductor coil. Thistechnique allows us to control the plasma and substrate bias conditionsindependently.

Part 5—EO-SiN Microring Modulator

FIG. 7 is a cross section drawing of an exemplary microring modulatordevice fabricated in an EO-SiN platform.

FIG. 8 is a drawing showing an exemplary ring modulator 800 integratedor planar optic structure according to FIG. 7. Ring resonator 801 isoptically coupled to bus waveguide 805. The ring modulator 800 devicecan be modulated by applying a modulation voltage across electrodes 803.

A microring modulator fabricated in EO-SiN can be used to demonstratethe feasibility of fabricating active photonic devices in the describedEO-SiN platform. The ring modulator has emerged as an exciting devicefor a chipscale modulator due to its compact size and ultra-low powerconsumption. The power consumption of a microring modulator goes as¼CV², where C is the capacitance of the modulator and V is the drivingvoltage [22,23]. In silicon microring modulators, the power consumptioncan be very low down to the fJ/bit. However, the resonance wavelength ofa silicon modulator needs to be stabilized due to fabricationimperfections and temperature fluctuations. The stabilization consumesat least 100 fJ/bit assuming conservative estimates of temperaturefluctuation.

The EO-SiN modulator consumes very little power. A suitable modulatordesign includes a waveguide with a cross-section of about 1.5 μm wide by0.4 μm thick (FIG. 7). The optical loss due to the proximity of themetal electrodes is estimated to be about 0.03 dB/cm. Increasingelectrode separation to 5 μm can reduce loss to about 0.001 dB/cm.Optical loss and electrode proximity are a trade-off between electricalperformance and insertion loss and can be optimized to minimize overallpower consumption. For a ring radius of 20 μm and an electrodeseparation of 4 μm the capacitance is about 3 fF. For a driving voltageof 1V, the power consumption of the modulator is less than 1 fJ/bit(=0.75 fJ/bit). However, because there is no current needed to bias themodulator, the resonance stabilization consumes substantially no power.The EO-SiN modulator has very low optical loss and hence also consumesvery low optical power, which leads to a record high device efficiency.

A 10 GHz modulation can be used with an EO-SiN microring modulator. The10 GHz modulation speed can demonstrate the capability of the proposedelectro-optic, deposited, CMOS compatible platform. Assuming parallelplate capacitor with about 3 μm thick electrodes the electric fieldacross the waveguide should be about 1.75 MV/m for a 4 μm electrodeseparation. The RC constant for this configuration is 1.3 fs per micron.For a 10 mm length device the response time can be 13 ps, <70 GHz. Thering modulator has a length of only about 126 μm, which yields aresponse time of only 164 fs for an RC limit of over a Terahertz.

The described EO-SiN platform can enable substantially lossless, ps timescale phase modulation. The change in refractive index for anelectro-optic material is given by Δn=½n³rE, where is n is therefractive index of silicon nitride (2.0,) r is the electro-opticcoefficient (˜100-300 pm/V predicted) and E is the applied electricfield. For an electric field of 1.75 MV/m in the waveguide core andusing an electro-optic coefficient of 100 pm/V, a conservative estimatebased on theory¹¹, a change in refractive index of 7×10⁻⁴ is expected.For comparison, the length required to change the phase by half a wavein state of the art lithium niobate modulators for an applied voltage of1V is over 10 centimeters [24]. In silicon, using a reverse biased pnjunction, the same phase shift can be achieved in a length of 0.1centimeters but with an optical loss of 1 dB and an RC limited bandwidtharound 8 GHz [3]. However, the proposed EO-SiN will reduce this lengthdown to 0.3 to 0.8 centimeters (depending on the electro-opticcoefficient) with an RC limited bandwidth of 100 GHz.

Part 6—Applications

EO-SiN will enable unprecedented adaptability and agility in using theelectromagnetic spectrum with low cost, low power devices capable ofoperating from the visible to the mid infrared parts of the spectrum(˜500 nm-4000 nm). Complex devices can be engineered based on theproposed platform enabling multifunctional capabilities such ascommunications, sensing, and jamming in ultra-compact packages.

The described EO-SiN can revolutionize photonic devices and theirmonolithic integration with electronics. Monolithic integrationmaximizes performance by avoiding spurious inductance and capacitancefrom electrical wire bonding and/or chip-to-chip bonding. Monolithicintegration also minimizes cost by enabling complex device fabricationat the wafer level without the need for “piecing” together individualchips. Also, new methods and devices according to the Application canenable multilayer active photonics. Photonic devices can be builtaccording to the methods and devices of the Application with multipledevice layers in the vertical direction. Also, stacking photonics in thevertical dimension can transform photonics in a similar way to how manylevel mentalizations has transformed electronics.

EO-SiN can revolutionize on-chip quantum optics and nonlinear optics. Anactive photonic platform compatible with integration with electronicscan usher a new level of complexity quantum optic photonic circuitswhere lossless, ps scale switching is possible. Similarly, in the fieldof nonlinear optics, this novel platform of the Application cantransform Kerr frequency combs by enabling native f-2f stabilizationon-chip. New devices can also be made that combine χ⁽²⁾ and χ⁽³⁾ (thirdorder susceptibility) processes on a single chip with the phase matchingand dispersion engineering capabilities of high refractive indexcontrast waveguide structures.

Part 7-3D Photonics Structures

FIG. 9 is a drawing of an electro-optic silicon nitride 3D devicestructure where at least one additional silicon nitride layer has beendeposited on a substrate or base layer to form at least one more stackedpoled layer of a 3D photonics structure.

FIG. 10 is a drawing of an electro-optic silicon nitride 3D devicestructure having N stacked poled layers of a 3D photonics structure.

It will be appreciated that variants of the above-disclosed and otherfeatures and functions, or alternatives thereof, may be combined intomany other different systems or applications. Various presentlyunforeseen or unanticipated alternatives, modifications, variations, orimprovements therein may be subsequently made by those skilled in theart which are also intended to be encompassed by the following claims.

Part 8—Integrated Microheater

Poling of silicon nitride optical structure can also be performed by anelectric field impressed across a locally heated area on a sample, suchas by building an integrated microheater and using the sample'selectrodes for the poling. The microheater can be a resistive heater,such as a heater electrode deposited on a substrate or base layer. Oneof the same two electrodes used to create the poling electric fieldacross a gap, can also be used for ohmic heating by passing a heatingcurrent through an electrode. A voltage applied across the resistiveheater causes the heating current to flow through the heating electrodewhich causes an ohmic heating of the local area of the substrate or baselayer. Thus, the poling process by application of electric field can beperformed on a locally heated substrate or base layer.

FIG. 11 is a drawing showing an exemplary integrated ring modulatorstructure poled by an electric field impressed across a silicon nitridestructure heated by an integrated microheater. The exemplary structureand method of FIG. 11 is similar to that of FIG. 8. What is different isthat now the outer electrode, annulus electrode 113, in addition toproviding one of two electrodes for the high voltage bias (HV Bias) forpoling, now also can carry a heating current through the annuluselectrode 113 to provide heating in the local area so that the polingprocess method can now be performed on a locally heated structure,through ohmic heating of the annulus electrode 113 itself.

In the exemplary structure of FIG. 11, an integrated planar optical ringwaveguide 111 is optically coupled to bus waveguide 112. A circularelectrode 115 and annulus electrode 113 (e.g. a platinum annuluselectrode) are deposited around the ring waveguide to heat and pole thelocal structure including the ring waveguide 111 during the polingprocess. The circular electrode 115 is placed inside the ring waveguide111 concentrically. The radius of circular electrode 115 defines a gap117 between the annulus electrode 113 and the ring of the circularelectrode 115, a gap of about a few microns, typically about 0.1 to 10microns. The annulus electrode 113 at least partially surrounds theoutside of the ring waveguide 111 and the circular electrode 115concentrically. The ring waveguide 111 is disposed in the gap 117 suchthat there is gap between the inside edge of the ring waveguide 111 andthe circular electrode 115, as well as gap between outside edge of thering waveguide 111 and the annulus electrode 113.

Generally, the example shows how poling can be performed between anysuitable electrodes separated with a gap between the electrodes, so thatan electric field can be established between the electrodes by a highvoltage bias. Additionally, a heating current can be caused to flowthrough one of the electrodes for ohmic heating to heat the localstructure being poled by electric field.

The two ends of the annulus ring can extend to square pad electrodes(not shown in FIG. 11) for contact with micro probes.

When operating this setup, a set of conductive micro probes can bedescended from the top (from over the device side of the substrate) toget in firm contact with the circular electrode and the pad electrodesconnected with the annulus one. Then voltage is applied to theseelectrodes through the probes. When we only need to do poling, a highvoltage, typically 100V, is applied on the circular electrode and bothends of the annulus electrode are grounded, so that a strong statisticelectric field is built across the ring waveguide.

To do heating at the same time, the voltage applied on one end of theannulus electrode is changed from ground to a low voltage (typically10V). Because this voltage is relatively low, the additional heatingvoltage only slightly decreases the intensity of the poling field.However, the heating voltage can generate a powerful (if the resistanceof the electrode is controlled properly) heating electrode through theannulus waveguide. The current works as a heat source and heats up thering by resistive heating.

Example: Typically, with a current of 80 mA and a gap of 1.5 μm betweenthe annulus electrode and the ring, the heating current caused by theheating voltage, in simulations, we were able to heat up the ring toaround 200 C. Or 150 mA to 400 C.

While an exemplary ring resonator is shown in FIG. 8 and FIG. 11, thenew method of local poling in the presence of an integrated microheater(heating electrode) can be used for any suitable integrated structureincluding devices other than ring resonators or ring modulators wherethe device structure includes any suitable structural geometry whichallows for poling by HV bias applied across electrodes, or poling by HVbias applied across electrodes combined with ohmic heating by passing aheating current through at least one of the electrodes or anotherlocally disposed integrated microheater. For example, there can beintegrated electro-optical devices which include straight sections ofsilicon nitride waveguide to be poled during production.

The electrodes can be disposed on either side of a silicon nitrideoptical element, typically a silicon nitride waveguide, as shown in FIG.11. Alternatively, such as, for example, where there are typicallymultiple layers, the electrodes can be on different layers, such as,above and below a silicon nitride feature to be poled. Similarly, eitherone or both of the electrodes, regardless of positioning and geometry,can be used for ohmic heating as one or more integrated microheaters asdescribed hereinabove. For example, a first electrode can be depositedon the substrate or the base layer on a first side of or above at leastone silicon nitride optical waveguide, the first electrode to accept afirst polarity of a high voltage bias for poling. A second electrode canbe deposited on a second side of or below the at least one siliconnitride optical waveguide, the electrode to accept the other secondpolarity of the high voltage bias to impress an electric field acrossthe silicon nitride optical waveguide for poling.

The electrodes used to establish the electric field and/or to establishthe electric field where one or more of the electrodes is also used forlocal ohmic heating, can be the same as the device electrodes (internalterminals on the integrated chip or integrated circuit (IC)) which areused to later operated the electro-optic device post-production innormal operation of the integrated electro-optic circuit, typically anintegrated component (e.g. IC) of a larger circuit board, apparatus, orsystem. For example, in FIG. 8, and FIG. 11, the same electrodes usedfor poling or poling an electrode heated local area, can be the same asthe internal operating terminals of the exemplary electro-opticalsilicon nitride modulator.

While local heating by ohmic heating of at least one electrode wasdescribed in with respect to FIG. 11, there can be other forms of localheating during polling, such as, for example, local heating by anysuitable laser light. Alternatively, there can be fabrication withlarger area heating by heated plate, such as, for example, a hot plate.

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What is claimed is:
 1. An integrated device or a photonic deviceincluding electro-optical structure to be poled during devicefabrication comprising: a substrate or a base layer; at least oneoptical waveguide or photonic device comprising at least oneelectro-optic (EO) optical waveguide or at least one EO photonic deviceformed from a silicon nitride deposited on said substrate or said baselayer; a first electrode deposited on said substrate or said base layeron a first side of or above said at least one optical waveguide orphotonic device, said first electrode to accept a first polarity of ahigh voltage bias; a second electrode deposited on a second side of orbelow said at least one optical waveguide or photonic device, saidsecond electrode to accept a second polarity of said high voltage bias;and wherein said at least one optical waveguide or photonic device ispoled by application of said high voltage bias during production.
 2. Theintegrated device of claim 1, wherein at least one of said firstelectrode and said second electrode comprises an ohmic heating elementadapted to accept a heating current applied therethrough.
 3. Theintegrated device of claim 1, wherein said first electrode and saidsecond electrode comprise internal operating terminals of saidintegrated device.
 4. The integrated device of claim 3, wherein saidoptical waveguide or photonic device comprises a ring resonator, saidfirst electrode is disposed within said ring resonator, and said secondelectrode disposed outside of said ring resonator, and said firstelectrode comprises a circular shape, and said second electrodecomprises an annulus shape.
 5. The integrated device of claim 1, whereinsaid integrated device comprises an integrated silicon nitride opticalwaveguide or photonic device as part of a CMOS integrated circuit.
 6. Anelectro-optic (EO) silicon nitride device comprising: a substrate or abase layer; at least one electro-optic (EO) silicon nitride opticalwaveguide or at least one EO silicon nitride photonic device comprisinga silicon nitride deposited on said substrate or said base layer;wherein said at least one optical waveguide or said at least one EOphotonic device is poled to transform said silicon nitride deposited onsaid substrate, into an EO silicon nitride.